Nowadays, the IC process is updated once a year, and the resolution and refresh rate of the paired LCD screens are getting higher and higher, so the requirements for DDR are getting higher and higher. The following is a brief explanation of the difference in memory.
The difference between DDR5 and DDR4 memory lies in three aspects: bandwidth speed, single chip density, and operating frequency.
I. Bandwidth speed.
Compared to DDR4, the improved DDR5 feature will increase the actual bandwidth by 36%. The current bandwidth of DDR4 is at 25.6GB/s, while DDR5 has a bandwidth of 32GB/s.
Second, the operating frequency.
DDR4’s minimum operating frequency standard is 1600MHz, with a maximum operating frequency of 3200MHz (without overclocking), while DDR5’s minimum operating frequency is up to 4800MHz or more, a maximum frequency of 6400MHz.
Third, the single chip density.
DDR4 is currently mainly 4GB, with the maximum capacity of a single memory to 128GB, while DDR5 will have a single chip density of more than 16GB, which can reach a single higher capacity.
DDR5 will have improved command bus efficiency, better refresh options, and increased memory groups for additional performance.
The difference between DDR5 and DDR4 memory, then the next step is to talk about what role memory timing plays. Memory timing is a large string of numbers, separated by a dash when expressed, for example, 16-18-18-38.
The four numbers of memory timing correspond to the parameters CL, tRCD, tRP, and tRAS, and the units are all time periods, i.e., a pure number with no units.
CL (CASLatency): the delay time of column address access, the most important parameter in timing.
tRCD (RASto CAS Delay): the delay time for the transfer of the memory row address to the column address.
tRP (RASPrecharge Time): precharge time of memory row address select pulse.
tRAS (RASActive Time): The time when the row address is active.
Lower timings represent better particle bodies and higher overclocking potential. Memory timing increases with frequency. Memory latency can be calculated using this formula: Memory Latency = Timing (CLx 2000 ) / Memory Frequency.
Even though the timing of the memory increases with frequency, the final memory latency does not change much. The lower the timing, the lower the latency when the frequency is the same. Similarly, the higher the frequency, the lower the latency when the timing is the same.
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